History of GenBoard/UnderDevelopment/VerThreeOldNotes
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2005-04-16 21:26:41 . . . . MembersPage/JörgenKarlsson [Moving the entire GenBoard/UnderDevelopment/VerThree here as backup]


Changes by last author:

Added:
GenBoard/VerThree layout changes, going towards v3.3

Developers use this page to take notes and lock the binaries for editing when there is developement, such as a new release.

This page is for onboard circuits and layout; New ways of using the board belongs to GenBoard/UnderDevelopment/FirmWare or their own topic (or OtherUses maybe).

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* layout TODO - sending in new manufacturing batch is close

The v3.2 quality is awesome. We just want very minor adjustments, and make sure not to break anything.

small PCB proposals

* DONE: move the 0805 cap between main regulator and transient protection diode (not breaking solderpaste mask, not populated anyway: we just close it's old pads-window). (DONE with the small change near MCP3208)

* consider freeing the AVR ADC channel from TPIC8101. We'll never use the HIP9011 chip, and the reading through SPI makes so much more sense (I wonder why they provided this analog output in the TPIC8101 at all)

* consider dropping the small inductors between AREF and VCC and AVCC

** maybe add a separate 78L05 for the PS2 keyboard

* short C44 and C55 (those with lame EGT sensor can cut it - very rare) Not enough, the EGT implementation is a bit broken on all previous boards and will have to be revised. -Jörgen

* Add Hall sensor signal conditioning to the trigger circuit, basically a 74xx132 NAND schmitt trigger should do it.

Changes that break solderpaste mask - no big deal

* consider raising ign259 supply

** maybe by adding a diode under 78L05 GND - The diode change breaks the existing solderpaste-mask (saved from v3.2 assembly) unless this diode is populated manually.

** or is there a 5.5V or 6V 78L06? that would be nice. Maybe buy 74AHCT259D (or TSSOP that we'll use anyway) for ign259 and drive from 6V

* 150k series resistor in series with c38 to push down LM1815's adaptive arming threshold

* adding an SMB footprint transient protection diode parallel with the big one. The SMB could be 20V (populated in factory) while the big throughole 18V (manually populated, if at all)

* add flyback to WBO2 FETs. The DPAKs are likely to be used for WBO2 heater in the future, so these can be useful for many tasks.

* add 1..2 18..20V SMB transient protection diode from flyback path to GND5. It could protect from non-PWM-ing abuse, and prove the user-error (not connecting flyback) for PWM-ing abuse (maybe it would save the FETs to, but keep injectors powered when ruined - it gets shorted).

* add a drill for flyback airwire

* consider 47k pullup for TPS (makes idle or WOT switch easy, and simple to detect unconnected TPS)

* rotate MPX4250AP MAP sensor clockwise 10..15 degrees. This makes it easier to mount the hose in the standard way (connector between EC18 and EC36) and less stress on the sensor nipple. This sacrifices the bottom VEMS logo.

Significant change - thinking out loud

While this would cut down some manual work at assembly, it could cause problems with logistics, and there is some risk of unforeseeable effects.

* change to DPAK FETs and IGBTs

** it must be verified how much heat we can drain through an Al plate touching the back of the DPAKs (interesting for VemsFrontier/ArmEfi as well)

** pushing the Al plate against the DPAKs (mounted on the bottom of the board) is possible (not even hard), but this would mechanically stress the PCB unless we apply force from the top

** however this rules out the chance to put 2 v3 units into the same Alubos case. A hole on the left side of the PCB, appr. around the MCP3208 would fix this too

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Manufacturing preparations - basically as before

We dropped the idea to transfer the files to the PNP machine fully digitally

* we just transform our cordinates to their like, (which means 1/100 mm resolution, referenced from the fiducial point)

* we print list-top.txt and list-bottom.txt (not unified top-bottom as in list-pnp.txt): they type coordinates into their machine, still faster than doing the teaching fully manually from the drawing. Appr. 180 0805 components...

* the BAV99, SMB diodes and chips need special care anyway.

* teaching will take just 215 * (50 sec instead of 120) this way

Picknplace related TODO

* mount all 16 SMB GenBoard/Manual/DDFlyback diodes in factory for 0.7V + 0.7V flyback

* R154

* 10uF 1206cap at LCD supply

* R1,R2,R3,R4,C1,C2 Missing and need to have values set (knock)

* R112=2k4 for -8V on the LCD header (actually it only makes appr. -3.4V possible on Jason's LCD, but that's enough)

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Siemens MS72K fiasco

It was a little (harmless) misunderstanding: the basic-like control-file is compatible with the older MS72k (2500 components/hour) machine, but they use the big brother HSF...whatever machine for the assembly of v3.2 board.

I got a floppy with the files on it and a (matching) ready assembled PCB so I can verify the format. Unfortunately cannot read the floppy I got ... zzz ... We checked in the machine. I'm afraid it is GCR format, not MFM (I'd need an amiga) because it's not just the filesystem. Winshit doesn't say a meaningful error message (as usual) but it's really not standard format, I tried to read on block level on linux and I got IO error as well.

A friend just told that it is very common that CNC machines use a special format that he can read / write (with a special floppy drive), so we'll try that.

I couldn't find much useful info about Siemens ms72k format. However PADS have a module to print to it, so a known (preferrably simple) design can be used an example. If you have PADS software or something existing in Siemens MS72k format please write on this page. It should only take 3 minutes to export a simple existing design into MS72K format so we can do our output formatting module.

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DONE already:

* DONE: added caps on +12V and +13.7V (regulator primary side)

* DONE: added caps on EGT outputs, rerouted EGT '''swapping MCP3208_CH5 and CH6 would make it a bit nicer (1 less via) but the EGT was on CH6 (which is addressed as 5 because it starts from 0 :-) on v3.x. Either is OK for me

* DONE: rerouted around s259 to prevent R110 swimming in the oven

* DONE: Fixed a ton of DRC's, noted that something is wrong with the poly settings. The polygons happily overlap and short each other out in a few locations. Haven't ever used same signal overlapping polygons, don't know the tricks.

* DONE: Strengthened gnd5 (stepper, ign259), better clearance, minor cleanups

* DONE: added VCC_LM (we have 7 regulators now: VCC, VCC5, +5V, LCD, LM, HALL and 3.3V)

* DONE: Rerouted 3.3V reg and area

more TODO:

* Add VEMS logo to board after fixing all DRC's. Vemslogo.zip is in the filethingy. (which???)

* DONE: 12V_REG no feed, added dummy resistor, thruhole PAD is not possible

* change some via to (more useful) PAD near GNDs ?

* DONE: check that all 3.3V and 5V nets have at least a 1206 cap (maybe a 1210 as well wouldn't hurt so we have option at assembling)

* DONE: more GND5 and AGND around the place of removed stepper diodes

* DONE: rotate U27 90 deg counterclockwise

* DONE: C73 might move to blue side: C78 close anyway, and +5V .. AGND caps consume less space on the blue side. One of them can be 1210

We should be close, but the schematic should be checked. (manually, automatically.

* No pad that was on AGND should be allowed to be VCC now (there were some very recently :-( )

* No pad that was on VCC should be allowed to be AGND now (this shouldn't happen)

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ASAP TODO, GUYS please be quick. Thanks for the help, Jörgen, Keith

* DONE: CRITICAL: I DESTROYED AGND (merged with VCC) on 228, and noone noticed for several revisions. I know how it happened: there was a small poly, which I should have ripped up and recreate, but I renamed in 2 steps, first intermediate name "dfkslgl"; somehow it didn't work (or renamed not only the poly but the whole junk). VERY BAD. Extreme caution is needed when renaming.

* Check and fix difflist:

These are different wnen comparing the agnd nets of 232 and 227.

Component pin

c27 2

c77 2

c92 2

c96 1

r148 2

r67 1

r71 2

u13 11

u14 14

u7 11

* you can use SMD networks if you like, like:

** 94-00-04 10K . YC164 (YAG) 4X10K IZOL. 1206 5% 200PPM

** 94-00-08 100K . YC164 (YAG) 4X100K IZOL. 1206 5% 200PPM

* Add capacitors after the EGT voltage dividers, we don't want to use 1k resistors just because the cap is missing. Tried, but MidOpa is in the way as usual:( -Jörgen

* DROPPED: SMD crystal at least the AVR crystal (the knock crystal can stay throughole)

* consider yet another VCC split: SOT89 78L05 (eg. located above VCC5 78L05) for 2x LM1815 and LCD

* DONE: move primary (left) LM1815 up (the trigger input, decoupling and railing stuff was moved towards the EC)

* DROPPED: consider a small uC (like AudiTrigger board, but with 0805 components) or a "feature connector" i.e. loopback connector for trigger signals. hardly fit

* DONE: finish OC1A OC1B routing. In the worst case, their old route (and they finish their way on the blue side to the DPAK FETs).

* DONE: change v3.1 text to v3.2

* DONE: MC33269-DT5.0 main supply. I thought this could be close to MPX4250AP so heatsink can be easily mounted there (holes). But it's almost the same place where LM2940 was. Without heatsink MC33269DT5.0 DPAK is 92C/W junction2ambient and max 150C junction.

* DONE: can someone help me with eagle libs ? 7805DT pinout is NOT same as MC33269-DT5

* DONE: change 2 extra FETs to DPAK (or IRF7821) and move them close to EC18 (no need for TO220 here) (they can be dead-sharp timed ign IGBTs !!!)

* consider SMB flyback diode for the above 2 extra FETs

* DONE: Separate SOT89 78L05 for the ign259. The VCC5 is not separated from VCC on sch. Should the VCC5 power only ign259 and not P259?

* DONE: kill the 2 SIL5-s as well (replace by 8x10k SMD resistors).

* consider more mounting holes (can be useful)

* DONE: SOT89 78L05 for +5V (but keep L1, L2 just in case).

* consider more caps (max 1206 on 5V traces; mostly 1206 on 12V, but the 1210 under the OPAs should stay), whereever fit.

* finish routing (DRC), currently 6 minor airwires and 1 clearance Note that the VEMS logo must be removed when checking DRC, there is real errors hiding in the myriad of errors it create!!!

FINAL TODO:

* DONE: min drill size=16 (at some places - namely on VCC and GND the DRC complains, near AVR; these need to be neglected).

* add VEMS logo (prolly blue, next to PWMing resistors)

* place the small 12 width ("shorting") wire between GND and AGND where they are neighbors

* check solder-protect layer (should be OK)

* drc (without VEMS logo). 2 airwire and minor width and keepout at some point is known.

* make gerbers

* send in (Marcell)

somewhat later (after gerbers sent in):

* review values, prepare assembly (update bin/categories.pl and categories.txt )

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why change?

v3.1 is very nice, and works very well. However stock is very low now, we should manufacture at least 90..105 v3.2 very soon: I already got the last pricy components for v3.2.

* some changes (no time to do these for v3.2 so remains for v3.3 as it seems) are induced by the possibly shift to the GenBoard/VerThree/CustomCNCCase

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visibility of CAD files

Note that after GenBoard/VerThree stablized, there was a little change in eagle files visibility:

The schematics are on GenBoard/Manual/InitialTesting/VerThree (the PDF is searchable by component name), but the eagle is only used by the developers.

One can ask (eg. sometimes those who buy v3.x from WebShop ask).

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Eagle version

Note that eagle 4.11r2 cannot open the file (complains about damaged file or something..), and eagle4.11 is not on cadsoft download site any longer. Someone uploaded a

* [ eagle4.11e Linux RPM] that is originally for redhat/suse, but I installed successfuly on Debian GNU Linux with the help of alien package

* [eagle4.11e win32]

from the previously availabe free c@dsoft download.

:Working Cadsoft Links

||[German 4.11 2003]||

|| ||

||[English 4.11 2003]||

v3.0 => v3.1 was mostly cosmetics, but the better clearance and the SMD inductors made the board nicer to work with.

I guess we want SMD crystal for v3.2. Throughole sucks, SMD is a million times better to work with, either automated or manually.

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Note that with r180 we started v3.1. Some tiny PCB changes - the unused fill-lobes were cleaned. You should start from recent v3.1 when populating sections, and only check layout on r176 when you find components missing from v3.0 (rare)

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Preparations for 3.3 with surface mounted switches.

Unfortunately I have no internet connection when I write this. It's based on my local datasheets and paper literature.

You probably missed discussion about this: GenBoard/VerThree/CustomCNCCase

Let's continue here: GenBoard/PowerSwitcher

Ignition:

There is ignition igbt's in DPAK and D2PAK formats, DPAK seem a bit uncommon but ISL9V3040 is available as TO220, DPAK, D2PAK and TO262AA(TO220 with SMD flange).

There may be a problem with distributor application with surface mount IGBT's. An coil on plug application or waste spark application distribute the load and heat over several IGBT's. We may want to make room for one or two hole mount IGBT's for these applications.

If someone want to use the ignition fets for other applications a hole mount diode can be soldered from drain to vbatt to provide a low voltage flyback. Rare case, no need for us to bother. Let em hack. We only add flyback option where there is enough space (actually, there is space on the top side).

Injection:

I didn't find any DPAK FETs, but no worries, I only had two or three FET datasheets here while I had a bunch of IGBT data sheets. I'm sure that there is a ton of suitable FETs in DPAK package.

Provisions for flyback diodes is a must. I would like room for FAT hole mount components. I disagree. The FlyBack from SMB footprint diodes (and no resistors) work very nice. If someone wants PWMing and high voltage at the same time, he can do it with some external diodes. No need for throughole. That would partly kill the benefit of going to SMD-switches.

Do we want to add short circuit protection? I don't think so. (later, with the ARM: using similar circuitry as the 8 channel EGT).

Misc and Heater fets:

Only diode flyback. Short circuit protection?

D2PAK is a tight fit. It will probably work for IGBT and FET at the same time if we drop redundant components.

DPAK save a lot of space. It looks like we can easily fit everything. Surface mount components is mostly chilled by the footprint on the board and the smaller component leaves us room for more cooling surface. Cooling it by clamping something to the plastic of the component works better with D2PAK.

IRF7821 is a little SO-8 cased fet with amazing properties. Logic level control, MAX 12.5mOhm RDSon at 4.5Vgs, 30Vbr, 20C/W J-Drain lead, 50C/W j-ambient when mounted on 25square copper pattern, 11A continous with 70c ambient temp and before mentioned footprint. Slightly smaller footprint compared to DPAK.

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Locking procedure

We store(d see the visibility notes above) the files as

* FULL_URL_PLEASE/genboardv31_revision_initials.zip (or .tgz) containing sch and brd (older revisions had .zip.gif to fool the former bad config of wiki)

Not obeying the filename convention will result in lost work or extra work to find out what's going on. Store/retreive files in the wiki:

* [fileupload]

* [view uploaded files]

Please follow this procedure:

* download, examine, plan the changes

* check that noone happened to lock in the meantime: preferrably commit your plans to this wiki page

* lock the binary for editing, by changing the filename down to what you will use (increase revision number, and replace the initials with yours). No need to write LOCKED, the missing file will make locking clear.

* after you're ready, upload the file

* if you have a break during routing, longer than 25 mins, than please upload and unlock (you can lock again if other's not, but please check)

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EVERYONE, REMOVE ALL LOCAL COPIES OF JURG.LBR. THE FILE THAT HAS FOLLOWED 205 AND 206 REVISIONS OF THE ARCHIVE IS THE WRONG ONE.

The correct procedure to make a change in jurg.lbr is to aquire last known good version from me, talk to me, make changes, talk to me, send file to me.

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Sly, since you're in the latest timezone, I expect you'll do the latest mods to v3.1 (and the gerbers) before production on Monday 6:40 GMT (8:40 GMT in the worst case). Wake me at 4AM GMT if you see something that is hard to judge: +3630 3433677. Thanx.

NOTE, this is the LIVE branch.

No uppercase characters in the filename please

please verify the old test-CAM (with gerbview) too.

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If the above filename is newer than what's available under [uploaded files] than it is actually LOCKED, if the file is available, than RELEASED.

If the revision number of latest available file is higher than what's above, the highest number counts: for smaller changes not much risk of work-loss, so files can be uploaded without prev locking, but locking is nice).

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TODO: pickNplace manufacturing requirements

I got a document, unfortunately in Hungarian. Nothing special, we should be close.

picnkplace types:

* QUAD III/c (smaller, but still good: 48 types of components)

* Samsung CP45FV (more professional, ful optical verification, 104 types of components).

* For small series (<500, especially with no special high density components), dispenser will be used for solderpaste, not stenzil (mask).

* via under pads is not nice. At the pad edge... maybe ??

* pads should not merge into one. A small solderprotect between them is nice. (see the VBATT voltage divider 20k and 100nF :)

* 5 mm clearance around boardedge so the machine can hold the boards. We'll violate this. Hopefully only a few components will be done manually because of this. I don't fully get this, since the picnplace uses vacuum for holding the board, not edge-whatever..

* DONE on blue and red sides too: two 1.25 mm dia Cu circles in two opposite corners: no solderprotect above them. 1.25 mm ring left clear around them, The machine likes this (fiducial points)

* other trivial stuff (clean components, etc.)

* +10 components, that fall off when they make the machine eat the tape (not lost, just manual later...)

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TODO:

* change value of C88,C89 to 10uF 1210 35V. If we don't populate these (10uF, 35V OK?) caps in production, the jumper is not needed (but the board is not triggerable without)

Please use 0.1u and 0.22u for cap values (while you do the review), forget the micro symbol.

200 below refers to the v3.1..r200.. series, currently r222

<cell> can someone explain C44 to me ?

<mik> hehe :)

<cell> I installed a short (also to SJ9) when I did EGT measurements

<mik> maybe it wants a capacitor to terminate the "gnd" input?

* via 1880,1430 goes up

* DONE: R150 cuts AGND poly !!!

* DONE: C37=1uF

* DONE: C14=0.1uF +

* DONE: trigg2_conn pullup to vcc (not 13.8V): R48 goes to 2510,1660

* can we make all diodes SMB (big) or SOD80 (small)? (eg. d55 violates, and others around MCP3208 and OPA - protecting diodes...). Good replacement: LL4148GS08 (VIS) * SWITCH 100V 0.1A <4nsec SOD-80

* The LM1815 has internal clamping (max +-3mA), a sufficient resistor allows voltage of any amplitude. We put 10k + 10k + 1nF onboard. We leave place for railing zener diode between 10k-s (don't kill D14 and D27 zeners), but don't populate them (shall we populate 100k instead of diode to make external divider simpler?). See InputTrigger/AnalogSide for the recommended coil-voltage divider (100k / 1M)

* (OK on 200) caps on EGT outputs (but not populated by default)

* (OK on 200) TPS reroute

* DONE: move D54 up a bit to clear

* (OK on 200) we want to avoid TO92 (IC2, IC3), and any throughole that we can. Use SOT89 as (see U24). Thoroughole eats space, needs to be placed manually and most likely to cause problems (eg. both of emil's problems were with throughole!)

* (OK on 200) You don't need R155 because U10, U26 pad-system :-) can host an RC reset easily (look at 193_mg to straigthen vcc and reset_out connections)

* (DONE on 200) reroute TRIGG1 so it does not go around the 2nd LM1815. It's not that big ripup as it seems (the LM1815s go right a bit, or up)

* (DONE on 200) Add a pullup resistor to tps (just like clt), then an idle-switch can easily be used instead of a potentiometer.

* (DONE on 200) L1, L2 at VCC, +5V...: 10uH, 140mA 1210 CM322522-100K (BOU), net price: 21,70 HUF; stocked http://www.token.com.tw/inductor/inductors-cm.htm

* NOT BRD issue: L3 200 mil pad-distance standing (fits in the fuse pads asis) 1,5uH; 5,4A; RLB0912-1R5M (BOU), net price: 44,80 HUF; stocked

* decide if we want 5V option for FETdriver supply. The IXDN404SI can work from 4.5V..35V. Any FETs harmed from 14V Ugs?

* bigger hole for the transient supression diode

* the supply diode for the stepper driver allows stepper supply to rise when stepper flyback activates. Should we change diode to short/fuse/powerzener? (maybe just sch issue)

* R169 added after v3.0 do we need to rework the 3.0?? (what??)

* (DONE on 200) let's change reset circuit to MCP130-T (GND <=> VDD swap?). The National MCP809 has same pinout as MCP130-T (and different from Microchip MCP809!!!!) and smaller times (240..560msec still fucking huge!) because I have 100 and more available (or dual-footprint PCB?)

* add gnd & vcc tap-points on pcb

* gnd to agnd trace is a bit thin (it should be connected before sending to manufacture). yes.

We should use a 0 ohm or a ferrite bead ? no!! we should connect GND and AGND via trace (right before generating gerbers, we want to leave the separation of GNDs for later eagle revisions)

crystal insulator: digi-key # 492-1039-ND (with the solderprotect and crystal on bottom I don't think we need too much fanciness, but ...)

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TODO: v3.2 - later

* for v3.2 let's switch to MC33269-DT5 regulator because it is nicer and more available.

* move the upper-right 100k pump resistor down a bit. It's the rightmost of the 3 x 100k resistor right to the upper OPA (pin2 => 2V).

* crystal should be SMD

* use 20V 0.6kW UNIDIR 1SMB20AT3 (ONS) SMB (Transient suppression diode)

* Would it make sense to add additional pins for trigger signals, like JP7/JP8 and JP13/JP12 nowadays but with possibility to loop the signal through additional small triggerboard (multitooth sensor signal in/digital out or even after onboard LM1815 circuits)?

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TODO: sch, BOM, not urgent

* LED on reset loads the reset too much. Smaller resistor?

* lets kill some BOM components (change values). Consider: R129, R138, C17, knock osc=16MHz?

* sch todo (not urgent): we could maybe kill some BOM components. replace all 0.1 uF by 0.22 uF, but when used in RC (lowpass filter) the R must be changed. I think the AVR's recommendation of min. 10k does not apply when we have a cap over 1nF directly on the pin (with 0 Ohm). The 0.1uF is cheaper though - but we have little data on the supply noise, so better be safe. 0.22 uF is used at nernst pulsing, an important application.

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TODO: DONE

* DONE the MC34151D FETdriver cannot operate from 5V (6.5 .. 18V). Connect it to 13.8V, kill the 5V option (although the Ixys can work from 4.5V).

* DONE make max caps 0805

* DONE C70 wrong size now 805 we shoud change to 1210 for 1µF-10µF

* DONE +3.3V goes nowhere, add a pad

* DONE Update genboard v3.0 (text) to genboard v3.1

* DONE lcd contrast: add a resistor to Vcc

* kill GND fill or make clearance bigger around the EC pins and other places

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TODO: dropped

* straighten HEAT2 and friends to go 135 deg, down as much as possible

* add 17..18 V virtual zener (made from TO220 PNP hehehe ) parallel with D5 transient suppression diode

* DIFD+- could go to a header

* DIFE+- could go to a header

* U19A, U19D doesn't have protect resistor+diode like U19B, U11B

* JP_ISP: it has an unused pin A: Meant for an additional CS_ pin

* I just measured a 5 pin header that goes from PC motherboard to PS2 mouse:

# Data (red)

# Clock (blue

# GND (yellow)

# NC (keying)

# VCC (5V, green)

We could maybe use that on v3.1. Mik says no need to change it.

Holy batman, we're getting 2000 more FQPF.. FETs (ordered in 2004 March, scheduled for 2005 january, but they are hard to control, might drop in earlier :-(( ), although we have a lot in stock (appr. 1000, most at East Coast). What can we do with them? I really wanted to roll v3.3 and ARM boards with DPAK. Maybe we add some extra-fets near the edge :-)

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Special thanx to

the v3.1 core HW engineers:

* MembersPage/JörgenKarlsson

* MembersPage/KeithHargrove

* MembersPage/MarcellGal

* MembersPage/MichaelKristensen

v3.1 manufacturing and WebShop:

* MembersPage/MarcellGal

* MembersPage/JasonRussell

other contributions:

* MembersPage/DaveBrul

* MembersPage/EmilLarsson